Begin by adjusting the high and low level of the clock applied to the CCD : this can be done through the 4 potentiometers set onto the inferior board. Then assemble the boards, connect them to the PC parallel port with the cable, and power all on. Start PISCO and execute the SET0 command with the console. By measuring the pin 7 voltage you find any value : your mission is to bring it close to +6.0V with the potentiometer P3 of the inferior board. This clock is fH : it performs the charge transfer within the horizontal register.

Turn the potentiometer P3 once and check the CCD socket pin 7 voltage. If you get closer to +6.0V then turn on in the same direction, else try the other one. Some iterations are often needed. This voltage doesn’t need to be accurate to the hundredth of volt : few tenth are quite well. That’s finished for the fH high level.

Test now the CCD socket pin 8 : this represents the fH low level. Adjust the potentiometer P4 to bring it close to -4.0V.

The aim is now to adjust the level of the vertical transfer clock, namely V1 and V2. The CCD socket pin 22 represents the high level of these clocks : turn the potentiometer P1 to measure +0.5V. When done, check the pins 15, 16, 17, 18, 19, 20, 21 to be equal to this voltage.

The setting of the vertical clocks low level needs to execute the PISCO command SET255. The pins from 15 up to 22 (which are to the same potential) must be tied to –8.0V by adjusting the potentiometer P2.

The Reset clock range (pin 5) is set by Zener diodes : it can’t be adjusted, but it’s good to check it. The command SET0 must produce a voltage about +3V whereas the command SET255 must bring it to about –2V.

Measuring the low level of the Reset clock through the socket pin 5. The expected voltage is 2V, but the actual measure belongs to the tolerance.

The following table specifies the range of the high and low levels for each clock, according to Kodak :
 

Now we will check the DC voltages applied to the CCD. The first of them is VDD, pin 3 : it is adjustable whether you have chosen the option 1 for supplying the CCD output amplifier. In that case, and if you supply the camera with a +/-18V source, you must adjust the potentiometer P5 on the superior board to have a potential of 15V on pin 3. If you have chosen the option 1 but supply the camera with a +/-15V source, you can’t have +15V : turn the potentiometer P5 to have the maximum value (which can range from 12.6V to 12.9V). The CCD will work, but not in nominal conditions.

Having chosen the option 1 for supplying the CCD output amplifier, and working with a +/-15V power supply, the VDD level is +12.8V, a bit few face to the nominal voltage (+15V).

But with the option 2, the VDD level is not adjustable, but should hang around +14.2V with a +/-15V power supply (any other kind of power supply is absolutely forbidden here).

The other CCD continuous voltages must be seriously checked despite they are generated with Zener diodes.
Pin 1 is OG, must be close 3V.
Pin 4 is VDR, must be close to +10V.
Pin 6 is VSS, must be close to +0.7V.
Pin 23 is GUARD, and must be close to +7.0V
Pin 14 is the ground.
Pins 9, 10, 11, 12, 13, 24 are not connected.

The pin 2 is the output video signal. When there’s no CCD, its level is about 0V.

The hereafter table gives the continuous levels recommended by Kodak :
 

The next tables sum up the voltages to be measured on the CCD socket after having executed the command SET0 and SET255. The nominal values are given, but also those measured on an manufactured Audine, and then the values given by Kodak not to destroy the CCD.
 

If you don’t have those voltages, the classic reason is having inverted a polarized capacitors (Tantalum drop capacitors). This produces a shortcut and drops the supplies down (regulators Q1 and Q2 might heat strongly : draw your finger near them to check). A wrong Zener diode, or mounting it in the opposite sense produce the same effects.